Flash memory devices are used in a wide variety of electronic devices. A flash memory device offers non-volatile storage of data, and also conveniently allows the data to be programmed into the memory and erased from the memory multiple times, thus allowing a multitude of flexible applications.
A flash memory device performs all its embedded operations based on the generation and control of many design parameters, such as analog signals, maximum values, timings, etc. The values of these parameters depend on digital information stored in a series of dedicated registers in the flash memory that are associated with these parameters. Recent flash memory devices have their operations, such as program and erase operations, handled by a process implemented by program instructions stored in a read-only memory (ROM) and executed by a microcontroller. For example, a user can send a program or erase command to a flash memory system via a Command User Interface (CUI) to implement the corresponding program or erase flash memory operation. The command is interpreted by the microcontroller, and specific signals are then generated to control the digital hardware of the flash memory device in order to perform the requested flash memory operation.
Embedded operations in a flash memory device are complex, especially with regard to the generation and control of parameters such as critical analog signals, which have a very large range of values and various possible values, and require very fine control. These analog signals have to be properly initialized and, from time to time, updated in the various phases of the operation in order to have perfect control of the full operation. Examples of critical configured values based on analog signals include the start values of the cell gate voltage during a program operation, the start value of the cell source or bulk voltage during an erase operation, and the cell gate voltage value during a verify operation. These signals are obtained by regulating involved hardware charge pumps, and this regulation follows the desired configurations specified by the provided digital configuration values in the current phase of the ongoing operation.
All of the needed configurations for each analog signal in each operation phase are obtained by loading the corresponding digital information (values) into the associated dedicated registers. In many existing flash memories, the digital information is loaded into the dedicated registers through a direct load instruction having a format of an opcode, which is the command indicating that it is a load instruction, followed by an operand, which is the configuration value to load in the associated dedicated register.
However, this approach tends not to be very flexible. For example, in new technology devices that are in continuous development, the effective values of specific parameter signals are only estimated by referring to current process data, and then the device is simulated with the estimated values. The results of the simulation are then compared with data resulting from actual measurements performed during a debugging procedure of the memory device. As a result of the comparison, the values of particular signals, and thus the configuration values that determine these signals, may be changed during the debugging procedure or following the process development if the performance of the system is not within desired specifications.
If a change in a given configuration occurs, two possible methods are typically used: a change in the ROM process code is made to change the configuration values, and/or the configuration values are changed using configuration fuses. The first method, a change in the ROM process code, includes changing the configuration value of the instruction programmed in the ROM. The instruction written in the ROM includes a direct operand, i.e., the configuration digital value is part of the instruction. Thus, in the event of a change in the value, new masks must be requested for the ROM. This solution has evident negative consequences in terms of design flexibility, since it has additional costs and has increased time to obtain new silicon for the ROM.
The second method allows hardware fuses to change configuration values. However, the evaluation of configuration fuses must be performed by the configuration process implemented by the ROM instructions. Typically, in each phase of an ongoing flash memory operation, the process has to determine whether a condition set by a configuration fuse is verified (using a compare (CMP) condition). If the condition set by a fuse is verified, the process executes the proper “LOAD data” instruction stored in the ROM in order to load the correct configuration value into the dedicated register. Thus, the process code is longer and more complex because each load of a configuration value requires the use of an additional CMP instruction to check a fuse condition, and therefore many additional CMP and jump (JMP) instructions are needed. The code loses generality because loading values directly depends on the value of particular configuration fuses. Further, a significant drawback in this method is that the execution of additional instructions requires additional time. This drawback is particularly serious if the involved code branch is continuously repeated during the execution of the process code. Time-saving methods must be emphasized, if possible, especially during complex operations which take a significant amount of time to be completely executed and which must respect fixed timing requirements.
Accordingly, what is needed is an apparatus or method for configuring flash memory parameters that is more flexible and time-efficient. The present invention addresses such a need.